Understanding of Polarization Reversal and Charge Trapping under Imprint in HfO₂-FeFET by Charge Component Analysis

November 15, 2023

Ferroelectric field effect transistor(FeFET) has attracted attention as a candidate for emerging high-speed memory devices. FeFET is a transistor-type non-volatile memory that uses a ferroelectric film as the gate insulator. The direction of ferroelectric polarization can be controlled by the gate voltage, and the threshold voltage V_th of the transistor shifts by the polarization reversal. Especially, HfO₂-FeFET, which uses HfO₂ as a ferroelectric film, has the advantages of low-voltage, high-speed operation and CMOS compatibility.

We focus on “imprint”, which is one of the critical reliability challenges in FeFET. Imprint is a phenomenon in which the gate voltage required for polarization reversal(coercive voltage V_c) shifts while the polarization state is maintained(Figure 1). In a capacitor structure (MFM^*1), the spontaneous polarization P_s versus the gate voltage V_g(hysteresis) shifts to the left or right as a result of imprint. Since FeFET(MFIS^*2) has a SiO₂ interfacial layer(IL-SiO₂) with low dielectric constant, it is necessary to consider not only the V_c shift due to imprint but also the change in the internal electric field due to interfacial trap charge. However, the measured charge generally contains both P_s and trap charge. Therefore, we separately extracted P_s and trap charge of FeFET experimentally and quantitatively by our original method^[1], and clarified the imprint model in FeFET.

Figure 2(a) shows gate voltage dependence of P_s extracted by our original method^[1] in MFIS. V_c, which yields the same P_s, shifts between the negative and positive imprint states, confirming the typical imprint behavior in the MFIS(①). Figure 2(b) shows gate voltage dependence of V_th in MFIS. V_th contains information on both P_s and trap charge. From Figures 2(a) and (b), we found that there is a V_th shift(②) in addition to a V_c shift(①) between the different imprint states. In this work, we found that the two imprint states take different V_th despite the same polarization in MFIS.

As mentioned above, the origin of the V_c shift(①) is the imprint observed also in the MFM. The reason for the difference in V_th(②) despite the same P_s can be explained by the difference in interfacial trap charges. Figure 3 shows a schematic diagram of the polarization state and trap charge for negative and positive imprint states at V_c. Absolute value of V_c for positive imprint state is higher than that for negative imprint state. By applying a higher absolute value of V_c, not only polarization is reversed, but also holes are trapped near the interface. Therefore, the negative and positive imprint states with different V_c change the charge trap density at the interface after erase. As a result, modulation of V_th is observed.

We found that V_th modulation due to trap charge occurs in addition to V_c shift due to imprint in FeFET. We believe that this result is a valuable knowledge to improve the reliability of FeFET.